1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device having a stacked gate structure formed by stacking a floating gate electrode and a control gate electrode on a semiconductor substrate, and a method of manufacturing the same. In particular, this invention relates to a nonvolatile semiconductor memory device and a method of manufacturing the same for improving a tunnel insulating film between a floating gate electrode and a substrate.
2. Description of the Related Art
Recently, in electrically programmable and erasable nonvolatile semiconductor memory devices (EEPROM), scale down of the devices has been being rapidly promoted. In EEPROMs, there has been adopted a method in which electrons are injected into a floating gate electrode from a substrate through a tunnel oxide film (writing), or electrons in the floating gate electrode are extracted therefrom (erase), by applying a high voltage to a control gate electrode.
In this operation, a high voltage is required to inject or extract electrons into (from) the floating gate electrode, and a large stress is applied to the tunnel oxide film. Thereby, a defect called “trap” is generated in the tunnel oxide film, a leak current increases, and data holding property and the like are hindered. A leak current caused by stress application strongly depends on the film thickness of the tunnel oxide film. The thinner the tunnel oxide film is, the more likely the leak current flows. This phenomenon is a large factor which hinders reduction in the thickness of the tunnel oxide film.
As means for solving the problem, adopted is a method in which nitrogen is introduced into the tunnel oxide film, thereby a dielectric constant thereof as the tunnel insulating film is increased and physical film thickness of the film is increased to reduce the leak current. In this method, nitrogen introduced into the tunnel insulating film, by annealing a silicon oxide film by ammonia (NH3) gas, carbon monoxide (NO) gas, or dinitrogen monoxide (N2O). However, in treatment using NH3 gas or the like, a large amount of hydrogen is introduced into the tunnel insulating film, and an after heat treatment at high temperature is required to secure the reliability of the device. Further, treatment using NO or N2O has a problem, such as increase in the hole trap amount in stress application, which deteriorates the reliability (Jpn. Pat. Appln. KOKAI Pub. No. 1-307272).
In the meantime, to increase the coupling ratio between the control gate electrode and the floating gate electrode, it has been proposed to use an insulating film having a dielectric constant higher than that of the conventional silicon oxide film and silicon oxynitride film as an interelectrode insulating film. However, if a high-dielectric-constant insulating film, such as a metal oxide, is used as an interelectrode insulating film, the metal diffuses into the tunnel insulating film through the floating gate electrode, and greatly deteriorates the reliability of the device.
As described above, as the tunnel insulating film of EEPROMs, required is an insulating film which does not easily form traps due to high-voltage stress application and has a reduced leak current. However, in prior art, it is very difficult to meet such specs. Further, using a high-dielectric-constant insulating film such as a metal oxide the interelectrode insulating film causes the problem that the metal is diffused through the floating gate electrode into the tunnel insulating film and causes deterioration in the reliability of the tunnel insulating film.